If you are an IoT device maker struggling with battery life and heat issues — this project developed embedded DRAM memory optimized for ultra-low power on 28nm and 14nm chip technology. That means your next-generation sensors and wearables could run significantly longer between charges. The consortium of 12 partners across 5 countries validated this with test chip samples and a full silicon evaluation.
Ultra-Low-Power Memory Chips That Let IoT Devices Run Longer on Less Energy
Imagine your smartwatch or home sensor's tiny brain needs memory to work, but that memory guzzles battery like a thirsty car engine. REMINDER figured out how to build a new type of memory chip — using the most advanced 28nm and 14nm manufacturing processes — that sips power instead of gulping it. Think of it as going from a gas-guzzler to an electric car, but for the tiny chips inside billions of IoT devices. They built and tested actual silicon chips to prove it works.
What needed solving
IoT devices — from smart sensors to wearables — are constrained by how much power their memory chips consume. Conventional embedded memory drains batteries fast and generates heat, limiting what connected devices can do and how long they last. Companies building the next generation of always-on IoT products need memory that works at ultra-low power without sacrificing performance or reliability.
What was built
The project built and tested silicon chip samples with embedded DRAM using floating-body memory cells, fabricated on advanced FDSOI 28nm and 14nm technology nodes. A system-on-chip demonstration was completed with benchmarking against existing memory solutions, supported by new simulation tools and variability-tolerant design techniques across 49 deliverables.
Who needs this
Who can put this to work
If you are a chip design company looking to integrate better on-chip memory into your system-on-chip products — REMINDER developed floating-body memory bit cells with variability-tolerant design techniques for FDSOI 28nm and 14nm nodes. This gives you a proven embedded memory building block that reduces power without sacrificing speed or reliability. The project delivered 49 deliverables including test chips with multiple eDRAM instances.
If you are a medical device company where every milliwatt matters for patient-worn sensors — this project created memory solutions specifically designed for extreme low-power operation. The floating-body memory approach reduces both voltage and power draw at the chip level, directly extending device uptime. Test chips were fabricated and evaluated in real silicon, not just simulation.
Quick answers
What would it cost to license or integrate this memory technology?
The project does not publish licensing fees. Since the coordinator is a university (Universidad de Granada) and the consortium includes 5 industry partners and 2 SMEs, licensing or collaboration terms would need to be negotiated directly. Based on available project data, the technology targets FDSOI 28nm and 14nm nodes, which are commercially available fabrication processes.
Can this scale to mass production?
The technology was designed for industry-standard FDSOI 28nm and 14nm technology nodes, which are already in volume production at major foundries. Test chip samples with multiple eDRAM instances were fabricated and evaluated, demonstrating silicon-level feasibility. Scaling to production would require foundry partnership but uses existing manufacturing infrastructure.
Who owns the intellectual property?
IP is shared among the 12 consortium partners across 5 countries (Switzerland, Spain, France, South Korea, UK) according to the project's grant agreement. The consortium includes both universities and industry partners, so licensing arrangements would depend on which specific innovations you need. Contact the coordinator for IP access terms.
How does this compare to existing embedded memory solutions?
REMINDER specifically targeted the replacement of conventional eDRAM with floating-body memory cells optimized for low power, low voltage, and variability immunity. The project benchmarked its solution against alternative embedded memory blocks as part of its system-on-chip demonstration. Based on available project data, advantages include reduced power consumption and improved robustness at 28nm and 14nm scales.
What was actually demonstrated and tested?
The project delivered test chip samples integrating multiple eDRAM instances with a detailed silicon evaluation report. A system-on-chip application was demonstrated using the developed memory solution. In total, the project produced 49 deliverables covering design, fabrication, characterization, and benchmarking.
Is this technology ready for commercial products today?
The project closed in June 2019 with validated test chips, placing it at prototype-to-tested stage. Moving to a commercial product would require additional engineering for specific product integration and qualification. The 5 industry partners in the consortium may have already advanced parts of this technology closer to deployment.
Who built it
The REMINDER consortium of 12 partners is well-balanced for taking chip technology from lab to industry. With 5 industry partners (42% of the consortium) including 2 SMEs, alongside 4 universities and 3 research centers across 5 countries (Switzerland, Spain, France, South Korea, UK), the project had both the academic depth for cutting-edge semiconductor research and the industrial muscle to validate results in real silicon. The inclusion of South Korean partners is notable — South Korea is home to major memory chip manufacturers. The coordinator, Universidad de Granada, brings strong nanoelectronics expertise. For a business looking to access this technology, the industry partners are the most likely path to near-term licensing or collaboration.
- UNIVERSIDAD DE GRANADACoordinator · ES
- STMICROELECTRONICS FRANCEparticipant · FR
- SURECORE LTDparticipant · UK
- INSTITUT POLYTECHNIQUE DE GRENOBLEparticipant · FR
- COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESparticipant · FR
- IBM RESEARCH GMBHparticipant · CH
- Gold Standard Simulations ltdparticipant · UK
- SYNOPSYS (NORTHERN EUROPE) LIMITEDparticipant · UK
- UNIVERSITE GRENOBLE ALPESthirdparty · FR
- Korea Institute of Science and Technologyparticipant · KR
- UNIVERSITY OF GLASGOWparticipant · UK
- CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRSthirdparty · FR
Universidad de Granada, Spain — reach out through their nanoelectronics or electronics engineering department
Talk to the team behind this work.
Want an introduction to the REMINDER team to discuss licensing their ultra-low-power memory technology for your IoT products? SciTransfer can connect you directly with the right consortium partner.