SciTransfer
TRISTAN · Project

Industrial-Grade Open-Source Processor Ecosystem for European Digital Sovereignty

digitalTestedTRL 5

Imagine if the blueprints for a computer's brain were open for everyone to improve, like a community garden instead of a private fence. This effort builds a high-quality library of these open blueprints so companies don't have to rely on a single foreign supplier. It also creates the digital tools needed to test and refine these brains quickly before they are physically manufactured.

By the numbers
49
Total partners
37
Industry partners
14
SMEs involved
12
Countries represented
The business problem

What needed solving

European companies rely on proprietary processor designs, leading to high licensing costs, vendor lock-in, and a lack of digital sovereignty.

The solution

What was built

A repository of industrial-grade RISC-V building blocks and a software toolchain including a custom simulator trace parser and automated test generators for instruction encoding.

Audience

Who needs this

Automotive ECU designersIndustrial IoT chip manufacturersEmbedded software tool developersEuropean semiconductor SMEs
Business applications

Who can put this to work

Automotive
enterprise
Target: Electric Vehicle Power Systems Manufacturer

If you are a power systems manufacturer dealing with vendor lock-in for chip designs — this project developed industrial quality building blocks for power control that reduce dependence on single-source suppliers.

Telecommunications
enterprise
Target: Mobile Infrastructure Provider

If you are a provider dealing with high costs of proprietary processor licenses for mobile communication — this project developed an open-source RISC-V ecosystem that lowers costs and increases interoperability.

Industrial Automation
SME
Target: Embedded Systems SME

If you are an SME dealing with slow development cycles for custom chips — this project developed automated test generation and simulator tools that boost productivity in creating new processor extensions.

Frequently asked

Quick answers

What is the cost or pricing model for using these results?

Based on available project data, the project leverages Open-Source to reduce costs to companies and consumers, though specific pricing for the resulting building blocks is not listed.

Is this technology ready for industrial scale?

The project aims to industrialize the RISC-V ecosystem by creating a repository of industrial quality building blocks for SoC designs in domains like automotive and industrial.

How is the IP and licensing handled?

The project is based on the RISC-V Open-Source community to avoid vendor lock-ins and ensure European technological sovereignty.

How does this integrate with existing software tools?

The project has integrated RISC-V support into the NXP GDB IDE toolset and generated architectural description files for the LLVM software toolchain.

What is the timeline for deployment?

The project period runs from 2022-12-01 to 2026-06-30.

Consortium

Who built it

The consortium is heavily weighted toward commercial application, with a 76% industry ratio (37 out of 49 partners). The presence of 14 SMEs alongside large players like NXP suggests a broad supply chain approach, ensuring that the resulting open-source tools are practical for both small innovators and large-scale manufacturers across 12 countries.

How to reach the team

Contact NXP Semiconductors Germany GmbH regarding RISC-V industrial building blocks.

Next steps

Talk to the team behind this work.

Contact us to identify which RISC-V building blocks fit your hardware roadmap.