STREAMS · Project

Smart Liquid Cooling That Keeps High-Power Chips From Overheating and Wasting Energy

digitalPrototypeTRL 4

Imagine your computer chip is like a tiny kitchen with dozens of burners running at full blast — it gets dangerously hot, fast. STREAMS built a miniature plumbing system etched right into the chip's base that pumps coolant exactly where the heat spikes happen, adjusting in real time like a smart sprinkler system. It even harvests some of that waste heat to power its own sensors and valves. The result is a cooling solution that's 70% thinner than current approaches and cuts energy use by half.

By the numbers

70%

Thickness reduction of cooling system footprint

50%

Reduction in cooling energy consumption

25%

Decrease in pressure loss and fluid flow rate

300 W/cm²

Maximum hotspot heat density handled

200W

Total chip power in network use case

50W

Total chip power in micro-server use case

10mW

Harvested thermoelectric power for local functions

200ms

Thermal map anticipation response time

500µm

Lateral spatial resolution of heat sensors

The business problem

What needed solving

High-performance chips in data centers and network equipment generate extreme heat — up to 300 W/cm² at hotspots — that current cooling systems can't handle efficiently. Bulky external coolers waste energy, limit how densely you can pack servers, and can't react fast enough to sudden thermal spikes. Companies need smaller, smarter, more energy-efficient cooling that works at the chip level.

The solution

What was built

The team built and demonstrated a silicon-based interposer with integrated microfluidic cooling channels, embedded heat flux sensors (500µm resolution, 200ms response), self-adaptive micro-valves that adjust coolant flow in real time, and nanostructured thermoelectric generators that harvest waste heat to power the system's own electronics. A proof-of-concept of the versatile microfluidic actuation was demonstrated.

Audience

Who needs this

Data center operators hitting thermal density limits in high-performance computing racksNetwork equipment manufacturers designing next-gen 200W+ switching and routing chipsSemiconductor packaging companies developing advanced 2.5D/3D chip stacks with thermal challengesServer OEMs looking to reduce cooling energy costs (currently 30-40% of data center power)Defense and aerospace electronics firms with extreme heat dissipation requirements in compact form factors

Business applications

Who can put this to work

Data Center Infrastructure

enterprise

Target: Data center operators and cloud service providers

If you are a data center operator dealing with rising cooling costs and server density limits — this project developed a silicon-based active cooling interposer that reduces cooling system thickness by 70% and cuts energy consumption by 50%. It handles hotspots up to 300 W/cm² in micro-server applications at 50W power levels, meaning you can pack more compute into less space without thermal throttling.

Telecommunications Equipment

enterprise

Target: Network hardware manufacturers

If you are a network equipment manufacturer struggling with thermal limits in high-power networking chips — this project built a self-adaptive microfluidic cooling system tested for network use cases at 200W power levels. It decreases pressure loss and fluid flow rate by 25% while keeping temperatures within 15% below component limits, letting you push chip performance higher without redesigning your entire thermal stack.

Semiconductor Packaging

mid-size

Target: Advanced chip packaging and interposer companies

If you are a semiconductor packaging company looking for next-generation thermal management integrated at the interposer level — this project demonstrated IC-compatible heat flux sensors with 500µm spatial resolution and 200ms response time embedded directly in silicon interposers. The system includes nanostructured thermoelectric generators harvesting up to 10mW, enabling self-powered thermal monitoring without external wiring.

Frequently asked

Quick answers

What would it cost to integrate this cooling technology into our products?

The project does not publish pricing or unit cost data. However, the solution is designed to be IC-compatible and silicon-based, which means it can leverage existing semiconductor manufacturing processes. A licensing or co-development arrangement with the consortium would be the most likely path to integration.

Can this scale to industrial production volumes?

The project reached TRL4 (lab-validated prototype). The technology is built on silicon interposer manufacturing, which is already an industrial process. However, scaling from proof-of-concept to volume production would require further engineering and qualification — likely 2-3 years of additional development.

What is the IP situation and can we license this?

The consortium includes CEA (a major French research organization) and 3 industrial partners across France, Germany, and Spain. IP is likely held jointly by consortium members. Licensing discussions would need to go through the coordinator (CEA) or relevant industrial partners.

How does this compare to existing liquid cooling solutions on the market?

Current liquid cooling is typically external and bulky. STREAMS integrates cooling directly at the interposer level with a 70% thickness reduction. The self-adaptive microfluidic actuators reduce pressure loss and flow rate by 25% compared to fixed-flow designs, and built-in sensors respond in 200ms to anticipate thermal changes.

What power levels and heat densities can this handle?

Based on the project objectives, the system targets hotspot areas of 150 to 300 W/cm² and background areas of 20 W/cm². It was assessed for micro-server applications at 50W and network equipment at 200W total chip power.

Is there regulatory approval needed for this type of cooling?

Based on available project data, no specific regulatory requirements are mentioned. As a component-level thermal solution integrated into silicon packaging, it would need to meet standard semiconductor reliability and safety qualifications rather than standalone product certifications.

What is the timeline to get this into a product?

The project ended in June 2019 at TRL4. Moving to a product-ready solution (TRL7-8) would typically require 3-5 years of additional development, reliability testing, and manufacturing qualification. Some consortium partners may have continued development independently since project end.

Consortium

Who built it

The STREAMS consortium brings together 8 partners from 3 countries (France, Germany, Spain) with a balanced mix: 3 industrial companies, 3 research organizations, and 2 universities. The coordinator is CEA, France's top atomic and alternative energy research body, which brings deep silicon fabrication expertise. With a 38% industry ratio and zero SMEs, this is a heavyweight consortium built around large players — good for credibility and manufacturing know-how, but licensing negotiations will likely involve institutional IP offices rather than agile startup-style deals. The geographic concentration in Western Europe's semiconductor corridor (FR/DE) aligns well with the EU chip manufacturing push.

COMMISSARIAT A L ENERGIE ATOMIQUE ET AUX ENERGIES ALTERNATIVESCoordinator · FR
STMICROELECTRONICS FRANCEparticipant · FR
STMICROELECTRONICS CROLLES 2 SASparticipant · FR
ALBERT-LUDWIGS-UNIVERSITAET FREIBURGparticipant · DE
UNIVERSIDAD DE LLEIDAparticipant · ES
HAHN-SCHICKARD-GESELLSCHAFT FUR ANGEWANDTE FORSCHUNG EVparticipant · DE
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRSparticipant · FR

How to reach the team

CEA (Commissariat à l'énergie atomique et aux énergies alternatives), France — contact through their technology transfer office (CEA Tech)

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Next steps

Talk to the team behind this work.

Want to explore licensing this cooling technology or connecting with the STREAMS team? SciTransfer can arrange an introduction and help you evaluate the fit for your thermal management challenges.

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