If you are a device maker dealing with short battery life in AI-powered wearables — this project developed magneto-electric neural network hardware that uses energy consumption four orders of magnitude lower than current technology.
Ultra-Low Power AI Hardware for Energy-Efficient Edge Computing
Imagine a computer chip that works like a human brain, using tiny magnetic swirls instead of traditional electricity switches. These swirls act like messengers, allowing the chip to process information with far less power. It's like switching from a gas-guzzling engine to a high-efficiency electric motor for AI tasks.
What needed solving
Current AI hardware is limited by high energy consumption and reliability issues, making it difficult to deploy powerful neural networks on small, battery-operated edge devices.
What was built
A hardware-based deep Skyrmionic Artificial Neural Network consisting of ultra-low-power synapses, skyrmionic neurons, and multiplexed dendritic connections.
Who needs this
Who can put this to work
If you are a sensor company dealing with high heat and power drain during real-time image processing — this project developed skyrmionic devices that double the bandwidth for the same device footprint.
If you are a hardware provider dealing with the high cost of powering AI at the edge — this project developed ultra-low-power synapses that significantly reduce energy needs for local inference.
Quick answers
What is the expected cost reduction for AI hardware?
Based on available project data, the project targets energy consumption four orders of magnitude lower than state-of-the-art CMOS technology, which would drastically reduce operational power costs.
Can this technology be scaled for industrial mass production?
The project aims to prepare the European micro- and nano-electronics ecosystem for the future, though current work is focused on developing core building blocks like synapses and neurons.
Who owns the IP and how is licensing handled?
Based on available project data, the consortium includes 2 industrial partners and 3 universities, but specific licensing terms are not provided.
How does this integrate with existing electronics?
The system combines skyrmionic quasiparticles for computation with electrical CMOS connections for rapid inter-layer connectivity.
What is the timeline for a commercial product?
The project runs from 2024-01-01 to 2027-12-31, focusing on creating a hardware-based demonstrator.
Who built it
The consortium is composed of 6 partners across 4 countries (AT, EL, FR, UK). With a 33% industry ratio (2 industrial partners), the project balances academic research from 3 universities and 1 research center with commercial application, facilitating the transfer of discoveries to the semiconductor sector.
Contact ARISTOTELIO PANEPISTIMIO THESSALONIKIS in Greece
Talk to the team behind this work.
Contact us to connect with the SkyANN consortium for early hardware benchmarking.