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RISER · Project

European Open-Source Cloud Server Infrastructure Using RISC-V Processors

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Imagine if the blueprints for the brains of a computer were open for anyone to use and improve, rather than being locked away by one company. This project is building a set of server boards and software that use these open blueprints to handle cloud tasks. It's like building a Lego-style server system where different parts can be swapped easily to save energy and increase speed.

By the numbers
10
maximum microserver boards per platform
4
maximum RISC-V chips per acceleration board
7
number of consortium partners
The business problem

What needed solving

European cloud providers rely on proprietary hardware and software, creating dependencies on non-EU vendors and increasing energy costs for data centers.

The solution

What was built

A PCIe acceleration board and a microserver platform, accompanied by open-source firmware and a Linux-based software stack.

Audience

Who needs this

Cloud Infrastructure ProvidersOpen-source Hardware DevelopersEnergy-conscious Data Center OperatorsEdge Computing Hardware Vendors
Business applications

Who can put this to work

Cloud Computing
enterprise
Target: IaaS (Infrastructure as a Service) Provider

If you are a provider dealing with high energy costs and vendor lock-in — this project developed a microserver platform with up to 10 boards that reduces overhead through hyperconvergence. This allows for more energy-efficient containerized execution in a managed environment.

Data Storage
mid-size
Target: Networked Storage Specialist

If you are a storage company dealing with bottlenecks in key-value data retrieval — this project developed a microserver architecture supporting high-speed storage and networking. It enables distributed memory to be used by any processor in the system with very low overhead.

High-Performance Computing
SME
Target: AI Hardware Accelerator Manufacturer

If you are a hardware maker dealing with rigid proprietary interfaces — this project developed a PCIe acceleration board integrating up to 4 RISC-V chips. This allows for the acceleration of compute workloads using open hardware interfaces.

Frequently asked

Quick answers

What is the cost or price of these platforms?

Based on available project data, specific unit prices are not listed, but the project is supported by an EU contribution of EUR 5,316,125.

Can this be scaled to industrial levels?

The project focuses on standardized form-factor system platforms and a microserver architecture that interconnects up to 10 boards, indicating a path toward industrial scalability.

What are the IP and licensing terms?

The project explicitly focuses on open-source designs for system boards, open-source low-level firmware, and an open-source software stack.

How does this integrate with existing software?

It uses a representative Linux-based software stack and supports containerized execution, ensuring compatibility with standard cloud service environments.

What is the development timeline?

The project period runs from 2023-01-01 to 2026-12-31.

Consortium

Who built it

The consortium is heavily industry-driven, with 71% of partners coming from the industrial sector (5 out of 7). Notably, 5 of these are SMEs, suggesting a strong focus on commercialization and agility. The geographic spread across 5 countries (CH, DE, EL, ES, FR) ensures a broad European market reach for the resulting open-source hardware.

How to reach the team

Contact IDRYMA TECHNOLOGIAS KAI EREVNAS in Greece

Next steps

Talk to the team behind this work.

Contact us to explore licensing or partnership opportunities with the RISER consortium.