If you are a SoC designer dealing with complex integrated circuits where a single bug can lead to billions in losses — this project developed Lubifier that provides a mathematically proven 0% chance of errors. This ensures your product reaches the market faster and without costly redesigns.
AI-Powered Software to Prevent Costly Errors in Microchip Design and Production
Imagine building a giant skyscraper where one wrong bolt could make the whole thing collapse, but you only find out after it's finished. This tool acts like a super-smart digital inspector that checks every single connection before the building is even started. It uses AI to find hidden mistakes automatically, ensuring the final product is perfect every time.
What needed solving
Traditional chip verification relies on simulations that often miss subtle bugs, leading to physical production errors. These mistakes can cause losses reaching billions of euros and significant market entry delays.
What was built
An AI-assisted software platform called Lubifier that automates formal verification of digital designs. It features a plug-and-play UI for uploading design IP and generating detailed error reports.
Who needs this
Who can put this to work
If you are a startup dealing with limited specialized infrastructure for chip verification — this project developed a plug-and-play platform that eliminates the need for extensive training. It allows your small team to upload IP and receive detailed error reports immediately.
If you are a manufacturer dealing with the risk of physical production defects that affect every unit produced — this project developed an AI-assisted verification tool that ensures first-silicon success. This reduces the financial overhead of traditional simulation-based methods.
Quick answers
How is the software priced or sold?
The project intends to introduce the software to the market through a licensing-based business model.
Can this be used for large-scale industrial chip production?
Yes, the tool is designed to be scalable and suitable for both small startups and large enterprises to integrate into their design flow.
Who owns the intellectual property and how is it accessed?
The tool is developed by LUBIS EDA GMBH and allows users to upload their own design intellectual property (IP) for verification.
How does this integrate into existing design workflows?
It is a plug-and-play platform that eliminates the need for specialized infrastructure, making it easy to integrate into any design flow.
What is the expected timeline for market availability?
Based on available project data, the project period runs from 2024-01-01 to 2025-12-31, focusing on optimization for market introduction.
Who built it
The project is led by a single German SME, LUBIS EDA GMBH, which holds 100% of the industry ratio. This lean structure suggests a highly focused commercial drive, as the entire EU contribution of EUR 2,499,999 is directed toward a single entity's product optimization for market entry.
Contact LUBIS EDA GMBH in Germany for licensing inquiries.
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