If you are a data center operator dealing with unsustainable power requirements and high cooling costs — this project developed a Silicon Photonic IC that reduces transceiver power by 65%. This lowers your operational expenses and reduces carbon emissions.
Energy-Efficient Optical Chips for Hyperscale Data Centers
Imagine the internet's backbone as a series of highways where data is converted from electricity to light to move faster. Currently, the 'translators' doing this conversion use a lot of power and get very hot. This technology replaces those power-hungry electronic translators with a specialized light-based chip that does the same job using far less energy.
What needed solving
Hyperscale data centers face unsustainable power consumption and costs because electronic DSP chips in optical transceivers account for over 50% of the power and cost.
What was built
A Silicon Photonic (SiP) IC that performs signal processing in the optical domain, replacing the need for power-hungry electronic DSPs.
Who needs this
Who can put this to work
If you are a hardware manufacturer dealing with the high cost of DSP chips in your products — this project developed an all-optic chip architecture. It replaces expensive electronic components with a more efficient silicon photonics solution.
If you are a network provider dealing with the need for faster data rates in next-generation cellular infrastructure — this project developed a chip capable of 4*224 GB speeds. This ensures high throughput and scalability for metro networks.
Quick answers
How does this impact the cost of data center operations?
The technology reduces transceiver power consumption by 65%, which directly lowers OPEX and reduces carbon emissions for the data center.
Is the technology ready for industrial scale?
The company has developed photonic test chips at IMEC and other European FABs and demonstrated integration with industry leaders like Intel and Credo Technologies.
What is the IP status of the project?
NEWPhotonics has filed 5 patents covering the all-optical processing architecture, a calibration device for photonic circuits, and an all-optical buffer for congestion mitigation.
How does this integrate with existing hardware?
The SiP IC is designed for pluggable transceivers, co-packaged optics for GPU boards, and core-switches in hyperscale networks.
What is the timeline for deployment?
Based on available project data, the project period was from December 2022 to November 2024, with successful POC demonstrations occurring in March 2023.
Who built it
The project is led by a single SME, NEWPhotonics Ltd, based in Israel. While the consortium is small (1 partner), the business risk is mitigated by strong external validation through POC integrations with global enterprises such as Intel and Credo Technologies (Nasdaq CRDO) and the use of world-class fabrication facilities like IMEC.
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