If you are an autonomous vehicle manufacturer dealing with massive data processing needs for real-time safety, this project developed photonic neuromorphic accelerators that provide two orders of magnitude energy efficiency improvement.
Ultra-Low Power Secure AI Chips for Edge Computing and IoT Devices
Imagine a computer chip that works like a human brain, using light instead of electricity to process information. This makes it incredibly fast and uses far less power. It also includes a built-in 'digital fingerprint' that is nearly impossible to hack, keeping data safe without needing a stored password.
What needed solving
Current edge computing chips are too power-hungry and their security keys are vulnerable to memory-access attacks. This limits the deployment of AI in battery-operated or safety-critical IoT devices.
What was built
A photonic computing architecture using phase-change materials and a gem5-based simulation platform for design exploration.
Who needs this
Who can put this to work
If you are a smart factory equipment provider dealing with insecure edge devices prone to memory attacks, this project developed photonic PUFs that provide hardware-level security without long-term digital memory storage.
If you are a hardware security module designer dealing with CMOS-based PUFs vulnerable to machine learning attacks, this project developed augmented silicon photonics platforms that are more resistant to such attacks.
Quick answers
What is the estimated cost or price of this technology?
Based on available project data, specific unit costs or pricing models are not provided; the project is funded by an EU contribution of EUR 8,319,510 for research and development.
Can this be produced at an industrial scale?
The project uses CMOS-compatible platforms, which are the industry standard for mass-producing silicon chips, suggesting a path toward industrial scalability.
How is the IP and licensing handled?
Based on available project data, the specific licensing terms are not listed, but the project involves a consortium of 15 partners including 3 industry members.
How easy is it to integrate into existing software systems?
The accelerators feature RISC-V compliant interfaces, which are designed to ensure smooth adoption and programmability for developers.
What is the development timeline?
The project period runs from 2023-01-01 to 2027-12-31.
Who built it
The consortium is research-heavy with 15 partners across 8 countries. It is dominated by 8 universities and 4 research institutes, but maintains a 20% industry ratio with 3 industrial partners, including 2 SMEs, ensuring that the academic breakthroughs in photonics are aligned with commercial CMOS standards.
Contact CNRS (France) for technical specifications on the augmented silicon photonics platform.
Talk to the team behind this work.
Contact us to identify licensing opportunities for photonic PUF technology.