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Move2THz · Project

Scaling High-Performance Semiconductors for 6G and Next-Gen Wireless Connectivity

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Imagine if the 'brains' of our wireless devices were made of a rare, expensive material that only a few people could afford. This project finds a way to layer that high-performance material onto cheap, common silicon, like putting a thin skin of gold over a plastic mold. This makes the high-speed tech affordable and easy to mass-produce for everyone's gadgets.

By the numbers
7
patents generated
200mm
maximum InPoSi substrate size realized
300mm
MOCVD Reactor Prototype size
16
industry partners
The business problem

What needed solving

Indium Phosphide (InP) is essential for high-frequency 6G and sensing but is too expensive and scarce for mass markets. This prevents the transition from niche applications to wide-scale commercial use.

The solution

What was built

A scalable InP-on-silicon (InPoSi) platform including 100mm, 150mm, and 200mm substrates, a 300mm MOCVD reactor prototype, and validated HBT/HEMT device stacks.

Audience

Who needs this

6G hardware manufacturersSub-THz sensor developersCMOS foundry operatorsHigh-frequency amplifier designers
Business applications

Who can put this to work

Telecommunications
enterprise
Target: 6G Infrastructure Provider

If you are a network operator dealing with the bandwidth limits of current 5G hardware — this project developed InPoSi substrates that enable sub-THz frequency operation. This allows for significantly faster data connectivity and higher capacity in urban hubs.

Industrial Automation
mid-size
Target: High-Precision Sensor Manufacturer

If you are a sensor company dealing with low resolution in imaging and sensing — this project developed HBT and HEMT devices on a sustainable platform. This provides the high-frequency performance needed for advanced industrial imaging.

Consumer Electronics
enterprise
Target: Smartphone Chipset Designer

If you are a chip designer dealing with the high cost of Indium Phosphide substrates — this project developed a 200mm InPoSi process. This allows you to use standard CMOS manufacturing capacities to lower production costs.

Frequently asked

Quick answers

How does this project reduce the cost of InP components?

It replaces costly and scarce bulk InP substrates with InP-on-silicon (InPoSi), which is compatible with existing high-volume CMOS manufacturing capacities.

What is the industrial scale of the developed substrates?

The project has developed 100mm and 150mm InPoSi substrates, and has realized a 200mm InPoSi version combining tiling and Smart Cut processes.

What intellectual property has been generated?

Based on available project data, the technological developments have resulted in 7 patents.

How does this integrate with existing chip factories?

The InPoSi global standard is designed to be compatible with CMOS manufacturing capacities, allowing for easier upscaling of wafer size and volume.

What is the timeline for the project results?

The project runs from 2024-06-01 to 2027-05-31, with initial substrate and device prototypes already developed in the first period.

Consortium

Who built it

The consortium is heavily industry-driven with 16 industrial partners (57% ratio), including 9 SMEs. Led by Soitec SA, the group spans 7 countries, indicating a strong commercial focus on creating a European value chain from material production to final application.

How to reach the team

Contact SOITEC SA regarding InPoSi substrate licensing

Next steps

Talk to the team behind this work.

Contact us to connect with the Move2THz consortium for early adoption of InPoSi technology.