Imagine if the power components inside your phone were like bulky bricks taking up all the room. This technology shrinks those bricks into tiny, flat silicon layers that combine everything into one piece. It's like replacing a large toolbox with a single, multi-purpose Swiss Army knife that fits in a pocket.
Current power supply packaging relies on bulky materials like copper and epoxy that are hard to recycle and prevent further device miniaturization.
A product evaluation board and miniaturized power modules (LMU20P1) using Power Interposer Technology (PIT) and Active Power Interposer Technology (APIT).
If you are a device manufacturer dealing with limited internal space for batteries and chips — this project developed silicon-based converters that are 1/3 to 1/10 the size of existing ones. This allows you to either make the device smaller or add new features without increasing the footprint.
If you are a wearable tech company dealing with the need for discreet, lightweight health monitors — this project developed a 3D integrated power unit. It ensures improved energy efficiency and thermal stability in a miniaturized form factor.
If you are an IoT provider dealing with the high cost and environmental impact of copper and epoxy in power modules — this project developed a CMOS-compatible silicon substrate. This replaces hard-to-recycle materials with a more sustainable, integrated silicon-based approach.
Lotus converters will be priced similarly to current converters, allowing manufacturers to capture the full value of the improved design flexibility.
Yes, the project utilizes Lotus's patented silicon-based integration technology and Power Interposer Technology (PIT).
Based on available project data, the project has completed pilot and pre-production packaging runs for the LMU20P1 module and established test programs for yield analysis.
The technology is CMOS-compatible, meaning it can integrate FETs, inductors, and capacitors into a single silicon-based substrate using standard manufacturing technology.
The project period runs from 2022-11-01 to 2025-09-30, with recent activities focusing on moving from TRL 3-4 to TRL 7-8.
The project is led by a single SME, Lotus Microsystems APS from Denmark. With a 100% industry ratio and no university or research partners, the project is lean and focused entirely on commercial product development and industrial application.
Contact Lotus Microsystems APS in Denmark
Contact us to explore licensing or integration of the Power Interposer Technology.
