Imagine building a giant computer chip like a Lego set instead of one solid piece of glass. By breaking the processor into smaller, specialized blocks called chiplets, it's much cheaper to make and easier to fix if one part is broken. This allows data centers to run faster and use less power without the high cost of manufacturing massive single chips.
Traditional monolithic chip manufacturing is hitting a physical limit where larger chips lead to more defects and higher costs. This prevents data centers from increasing CPU core counts efficiently to lower their total cost of ownership.
The HELIOS platform architecture, which combines an I/O chiplet and a chiplet-to-chiplet interconnect to enable modular, open, and energy-efficient processors.
If you are a cloud provider dealing with high energy costs and hardware failures—this project developed the HELIOS architecture that uses chiplets to improve yield and power saving. This reduces the total cost of ownership for your infrastructure.
If you are a software company dealing with slow memory bandwidth for private databases—this project developed a high-performance I/O chiplet that improves latency. This ensures your corporate appliances and ERP tools run more efficiently.
If you are a government agency dealing with a lack of chip sovereignty—this project developed an open silicon architecture based on ARM cores. This provides a secure, standardized alternative to non-European processor vendors.
By splitting big monolithic dies into smaller interconnected chiplets, the project addresses the limit where manufacturing defects increase costs and lower output. This lowers the total cost of ownership (TCO) in data centers.
The project is targeting data center applications and has identified a €1.1Bn sales pipeline in Europe, indicating significant intended industrial scale.
SiPearl has partnered and contracted with Arm and other top-tier IP providers to develop their high-end microprocessors.
The approach is designed to run out-of-the-box main Linux distributions to ensure compatibility for customers.
The project period runs from 2022-07-01 to 2026-09-30 to support the development of the HELIOS platform architecture.
The consortium is highly industry-focused, consisting of 3 SMEs from France, Germany, and Spain. With a 100% industry ratio and no university or research institute partners, the project is structured for commercial delivery rather than academic exploration.
Contact SiPearl (FR) regarding the HELIOS platform architecture.
Contact us to explore licensing opportunities for chiplet-based I/O architectures.
