HECTOR · Project

Tamper-Proof Hardware Security Chips That Make Encryption Actually Reliable

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Imagine your office safe has a lock that sometimes doesn't click shut properly — that's what happens when the random numbers powering encryption are weak. HECTOR built and tested hardware components that generate truly unpredictable random numbers and device "fingerprints" that can't be cloned, then wrapped them with shields against physical tampering. They also figured out how much security you actually lose when randomness degrades, so engineers can design smarter trade-offs between cost and protection. The results target everything from tiny sensors to high-speed network equipment handling terabit traffic.

By the numbers

consortium partners

countries represented

industry partners in consortium

SMEs in consortium

67%

industry participation ratio

total project deliverables

The business problem

What needed solving

Every encrypted device — from smart meters to network routers — relies on random numbers being truly unpredictable. When hardware random number generators are weak or tampered with, the entire security chain breaks, potentially exposing millions of connected devices. Companies building secure hardware need proven, certified crypto components that work within tight power and performance budgets, but designing and validating these from scratch is expensive and risky.

The solution

What was built

The project delivered a complete demonstrator platform with VHDL hardware code for random number generators and physically unclonable functions, along with entropy testing methods, physical attack countermeasures, and quality metrics. Across 12 deliverables, the consortium produced validated security building blocks targeting three performance tiers: low-power embedded, low-latency memory encryption, and high-throughput terabit networking.

Audience

Who needs this

IoT chipset manufacturers needing certified hardware security for connected devicesTelecom equipment vendors building encryption for high-speed networksSecure microcontroller companies targeting automotive or payment certificationSmart card and payment terminal manufacturersDefense and government IT hardware suppliers requiring tamper-resistant components

Business applications

Who can put this to work

IoT and Embedded Devices

SME

Target: IoT hardware manufacturers building connected sensors, smart meters, or wearable devices

If you are an IoT device maker dealing with security vulnerabilities in low-power chips — this project developed hardware random number generators and physically unclonable functions with built-in entropy testing, designed specifically for constrained embedded devices. The demonstrator platform with VHDL code lets you integrate proven security building blocks directly into your chip designs, reducing the risk of a single weak random number compromising your entire product line.

Telecommunications

enterprise

Target: Network equipment manufacturers building routers, switches, or encryption appliances

If you are a telecom equipment vendor struggling to keep encryption performance up at terabit network speeds — this project built hardware crypto primitives optimized for high-throughput scenarios. The 9-partner consortium across 6 countries tested these against physical attacks and developed quality metrics, giving you certified building blocks that maintain security without becoming a bottleneck in next-generation network infrastructure.

Automotive and Industrial Security

mid-size

Target: Companies building secure microcontrollers for cars, industrial controls, or payment terminals

If you are a secure microcontroller manufacturer needing to pass certification for payment or automotive applications — this project delivered countermeasures against physical attacks with demonstrable entropy guarantees, plus inputs to standardization and certification bodies. The consortium included 6 industry partners and evaluation labs, meaning the results were tested against real-world attack scenarios, not just theoretical models.

Frequently asked

Quick answers

What would it cost to license or integrate these hardware security components?

The project produced VHDL code for the demonstrator platform, with part of it marked confidential. Licensing terms would need to be negotiated with the consortium partners, particularly the 6 industry members. Since this was a publicly funded RIA project, some results are publicly available while others are protected IP held by individual partners.

Can these components work at industrial scale and high throughput?

Yes — the project explicitly targeted three scale points: extremely low-cost and low-power for constrained embedded devices, low-latency for real-time memory encryption, and high throughput for terabit networks. The demonstrator platform validated these hardware implementations in practice.

Who owns the intellectual property and how can I access it?

IP is distributed among the 9 consortium partners across 6 countries. The VHDL code from the demonstrator is partially confidential, while the accompanying report and sample data are public. The coordinator TECHNIKON (Austria, SME) would be the first point of contact for licensing discussions.

Does this meet security certification requirements?

The project specifically aimed to make certification easier by providing demonstrable entropy guarantees and quality metrics, including on-the-fly entropy testing. Results were fed into standardization and certification bodies, which is directly relevant for Common Criteria or FIPS certification processes.

How mature is the technology — is it ready to drop into our product?

The consortium delivered a complete demonstrator platform with VHDL code, which puts this beyond pure research. However, as a Research and Innovation Action that ended in 2018, additional engineering work would be needed to productize these components for a specific application. The building blocks are validated but not turnkey.

Can this integrate with our existing chip designs?

The project was designed for flexibility across different hardware targets — from constrained embedded devices to high-throughput network equipment. The VHDL-based deliverables are intended as security building blocks that integrate into larger chip designs, not standalone products.

Consortium

Who built it

The HECTOR consortium is notably industry-heavy at 67%, with 6 out of 9 partners from industry and 3 of those being SMEs — a strong signal that the work was driven by commercial needs, not just academic curiosity. The 3 university partners provided the cryptographic research backbone while industry partners and evaluation labs handled real-world implementation and attack testing. Spread across 6 European countries (Austria, Belgium, France, Italy, Netherlands, Slovakia), the consortium covers key hardware security markets. The coordinator TECHNIKON is an Austrian SME specializing in research coordination, which means the actual technical IP is distributed among multiple partners — a business buyer would likely need to engage specific partners depending on which component (RNG, PUF, or countermeasures) they need.

TECHNIKON FORSCHUNGS- UND PLANUNGSGESELLSCHAFT MBHCoordinator · AT
TECHNISCHE UNIVERSITAET GRAZparticipant · AT
THALES SIX GTS FRANCE SASparticipant · FR
STMICROELECTRONICS ROUSSET SASparticipant · FR
UNIVERSITE JEAN MONNETparticipant · FR
STMICROELECTRONICS SRLparticipant · IT
KATHOLIEKE UNIVERSITEIT LEUVENparticipant · BE

How to reach the team

TECHNIKON Forschungs- und Planungsgesellschaft mbH, Austria — an SME that coordinated the 9-partner consortium. Contact via the project website or CORDIS contact form.

Order a report on this consortium See TECHNIKON FORSCHUNGS- UND PLANUNGSGESELLSCHAFT MBH profile →

Next steps

Talk to the team behind this work.

Want an introduction to the HECTOR consortium for licensing their hardware security IP? SciTransfer can connect you with the right technical partner for your specific use case — whether you need RNG, PUF, or attack countermeasure components.

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