Imagine your computer chip is like a piece of land where most of the space is taken up by a giant warehouse for data. This project replaces that bulky warehouse with a much smaller, smarter storage system that holds the same amount of info. It fits right into the existing factory process without needing any new expensive machinery.
Standard SRAM no longer scales in advanced CMOS nodes, leading to chips where memory takes up to 75% of the area. This results in larger silicon footprints and significantly higher fabrication costs.
A high-density on-chip memory (GCRAM) using 2-3 transistors per bit instead of 6-8. A digital test-vehicle for characterization is planned for tape-out in April 2025.
If you are an AI chip designer dealing with massive SRAM footprints that take up over 50% of your chip size — this project developed GCRAM that provides up to 50% silicon area reduction. This allows for more processing power on the same piece of silicon.
If you are a hardware provider dealing with high power drain in vehicle computers — this project developed a memory technology that offers up to 10X reduced power consumption over commodity SRAM. This extends battery life and reduces heat in the vehicle.
If you are a chip manufacturer dealing with the end of Moore's Law for SRAM in advanced nodes — this project developed a drop-in replacement for SRAM that works in nodes ≤5nm. This prevents cost increases associated with larger silicon footprints.
It reduces costs by providing up to 50% silicon area reduction and requires no additional process steps or costs because it is compatible with standard CMOS fabrication.
Yes, the project specifically aims to develop, fabricate, and characterize the technology for nodes ≤5nm.
The technology is protected by 13 granted patents, with several more in the approval process, making it available as a drop-in replacement for semiconductor companies.
It is fully compatible with the standard CMOS fabrication flow and requires no additional process steps.
The project is ongoing until 2026-06-30, with a target test-vehicle tape-out planned for April 2025.
The project is led by a single SME, RAAAM Memory Technologies Ltd, based in Israel. With a 100% industry ratio and no university or research partners, the project is lean and focused entirely on commercial qualification and deployment rather than basic research.
Contact RAAAM Memory Technologies Ltd regarding GCRAM licensing for ≤5nm nodes.
Contact us to connect with the GCRAM team for semiconductor integration opportunities.
