If you are a security firm dealing with the threat of quantum decryption — this project developed integrated photonic circuits and high-efficiency detectors that enable the hardware needed for blind quantum computing. This ensures data remains private even during processing.
Scalable Photonic Quantum Computing Hardware for General Purpose Processing
Imagine a computer that uses light instead of electricity to process information, making it much faster and less prone to errors. This project is building the 'plumbing' for these light-based computers, creating tiny chips that can steer and create light particles with extreme precision. It's like moving from bulky vacuum tubes to modern microchips, but for the quantum age.
What needed solving
Current quantum computers are often too bulky or unstable to scale. There is a critical need for integrated, chip-based quantum hardware that can handle thousands of qubits without losing information.
What was built
Three quantum computer prototypes and a suite of photonic components including low-loss switches, high-brightness photon sources, and pixelated detectors.
Who needs this
Who can put this to work
If you are a biotech company dealing with complex molecular simulations that crash current computers — this project is building prototypes to entangle >10 qubits. This is a step toward the >1000 qubits needed for simulating new medicines at scale.
If you are a network operator dealing with signal loss in quantum keys — this project developed an optical switch with internal loss <0.5 dB. This allows for more efficient routing of quantum states across a network.
Quick answers
What is the estimated cost or price of the resulting hardware?
Based on available project data, there is no specific pricing or cost information provided for the hardware components.
Can this technology be scaled to industrial levels?
Yes, the project specifically targets scalability by developing photonic integrated circuits (PIC) and aiming for a route to >1000 qubits.
How is the IP and licensing handled for the developed chips?
Based on available project data, the specific licensing terms are not listed, though the project involves 4 industry partners and 3 SMEs who likely share in the IP.
When will the prototypes be ready for testing?
The project period runs from 2024-01-01 to 2026-12-31, suggesting prototypes will be developed within this window.
How does this integrate with existing silicon technology?
The project uses nanofabrication that combines new switching with mature silicon compatible circuitry to ensure easier integration.
Who built it
The consortium is well-balanced for a deep-tech project, consisting of 19 partners across 11 countries. With a 21% industry ratio (4 companies, including 3 SMEs), there is a clear bridge between the 15 academic and research entities and the commercial market. This structure suggests the project is driven by high-level research but has built-in pathways for commercialization through the SMEs.
Contact Universita degli Studi di Roma La Sapienza
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