If you are an AI hardware startup dealing with slow time-to-market for custom silicon — this project developed the A90 and A110 high-performance cores that provide 5x faster time to market.
Custom High-Performance Processor Design Tools for Faster Chip Development
Imagine if you could design a custom brain for your electronic device instead of buying a generic one that doesn't quite fit. This project creates a set of blueprints and a digital drafting tool that lets engineers build these custom brains much faster. It's like moving from hand-drawing every single wire to using a smart architectural software that automates the hard parts.
What needed solving
Companies need custom chips for AI and IoT but lack the specialized expertise in electronic logic and compilers to build them quickly. General-purpose processors are no longer efficient enough for these specific high-performance needs.
What was built
Developed the A90 and A110 out-of-order processor architectures and updated the Codasip Studio EDA tool to support high-end compute designs.
Who needs this
Who can put this to work
If you are an IoT manufacturer dealing with the need for high-speed processing in small devices — this project developed a robust ecosystem for high-performance RISC-V cores and EDA tools to optimize power and speed.
If you are a data center provider dealing with the limitations of general-purpose microprocessors — this project developed out-of-order superscalar architectures like the A110 to handle data-intensive applications.
Quick answers
What is the cost or pricing for these tools?
Based on available project data, specific pricing for Codasip Studio or the processor IP is not disclosed.
Can this be scaled for industrial mass production?
Yes, the project focuses on providing processor IP and EDA tools that allow companies to design, manufacture, and sell their own RISC-V chips.
How is the IP licensed?
The project utilizes the RISC-V open instruction set architecture (ISA) standard, which can be freely used for any purpose.
How long does it take to integrate these tools into a design flow?
The Codasip Studio tool is designed to provide 5x faster time to market compared to traditional methods.
What is the timeline for the high-end core releases?
The project period runs from 2022-11-01 to 2025-07-31, with the A90 core leading toward the development of the A110 core.
Who built it
The consortium is highly streamlined and industry-focused, consisting of 2 SMEs from Germany and the Czech Republic. With a 100% industry ratio, the project is driven by commercial viability rather than academic research, focusing on the direct delivery of IP and EDA tools.
Contact Codasip GmbH in Germany for licensing of the A90/A110 cores.
Talk to the team behind this work.
Contact us to find compatible RISC-V IP partners for your next chip project.