CHIRON · Project

Ultra-Low-Power Computing Chips Using Spin Waves Instead of Electrical Current

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chiron-h2020.eu

Today's computer chips work by pushing tiny electrical currents through transistors — and as we make them smaller, they burn more energy and generate more heat. Imagine instead using tiny magnetic ripples, like waves on a pond, to carry and process information. That's what spin wave computing does. CHIRON built the first basic building blocks — logic gates and signal converters — that could let future chips compute using these magnetic waves at scales of 100 nanometers, potentially slashing power consumption compared to conventional electronics.

By the numbers

100 nm

Target lateral scale for spin wave devices

>10 GHz

Target resonance frequency for nanoresonators

Consortium partners

Countries represented

Device demonstrators delivered

Total project deliverables completed

The business problem

What needed solving

As conventional silicon chips approach their physical limits, companies face rising power consumption, heat management challenges, and diminishing performance gains from further miniaturisation. Data centres alone consume enormous amounts of electricity, and IoT devices need chips that can run on minimal power. The semiconductor industry needs alternative computing approaches that can work alongside existing CMOS technology without requiring a complete infrastructure overhaul.

The solution

What was built

CHIRON built working prototypes of spin wave logic gates (inverters and majority gates) and magnetoelectric transducers that convert between electrical signals and spin waves. These were fabricated at the 100 nm scale across two rounds of design specifications, with 7 device demonstrators delivered. The project also demonstrated frequency multiplexing — parallel data transmission through a single spin wave device — and designed hybrid spin wave–CMOS circuits benchmarked against conventional CMOS.

Audience

Who needs this

Semiconductor companies developing post-CMOS computing architecturesData centre operators seeking lower-power processing solutionsIoT hardware makers needing ultra-low-power embedded processorsDefence and aerospace electronics firms requiring radiation-hardened computingTelecommunications equipment manufacturers exploring high-frequency signal processing

Business applications

Who can put this to work

Semiconductor Manufacturing

enterprise

Target: Chip design and fabrication companies developing next-generation processors

If you are a semiconductor company running into the wall of Moore's law — transistors that can't shrink further without unacceptable power leakage — CHIRON developed spin wave logic gates (inverters and majority gates) operating at the 100 nm scale with resonance frequencies above 10 GHz. These building blocks are designed to integrate alongside existing CMOS technology in hybrid circuits, giving you a migration path rather than a complete redesign.

Data Center Infrastructure

enterprise

Target: Hyperscale data center operators and cloud computing providers

If you are a data center operator where power consumption is your largest operating cost — CHIRON's spin wave computing approach targets significant power and area reduction per computing throughput. The hybrid spin wave–CMOS circuit designs developed in the project were benchmarked against conventional CMOS, offering a roadmap to lower energy bills once the technology matures to production scale.

IoT and Edge Computing

any

Target: Companies building ultra-low-power embedded processors for sensors and edge devices

If you are developing edge computing hardware where every milliwatt matters — CHIRON demonstrated magnetoelectric nanoresonators that convert between electrical and spin wave signals with high energy efficiency. These transducers, operating above 10 GHz, could enable a new class of ultra-compact, low-power processors for battery-operated and energy-harvesting IoT devices.

Frequently asked

Quick answers

What would it cost to license or adopt this technology?

CHIRON was a publicly funded research project (RIA) coordinated by IMEC, one of the world's leading microelectronics research centres. Licensing terms would need to be negotiated directly with the consortium partners. Given the early-stage nature (proof of principle), expect R&D partnership models rather than off-the-shelf licensing.

Can this scale to industrial chip production?

The project specifically targeted the 100 nm lateral scale and resonance frequencies above 10 GHz, which are within the range of advanced semiconductor manufacturing. However, CHIRON delivered proof-of-principle demonstrators — inverters, majority gates, and transducers — not production-ready chips. Significant further development would be needed before foundry-scale manufacturing.

Who owns the intellectual property?

IP is shared among the 9 consortium partners across 6 countries, governed by their EU grant agreement. IMEC (Belgium) as coordinator likely holds key IP on fabrication processes. Interested companies should contact the consortium to discuss licensing or co-development arrangements.

How does this compare to other post-CMOS technologies?

Spin wave computing competes with other emerging approaches like spintronics, quantum computing, and photonic computing. CHIRON's advantage is that its hybrid circuits are designed to integrate directly alongside existing CMOS, reducing adoption risk. The project benchmarked its circuit designs against CMOS to demonstrate viability in power, area, and throughput.

What was actually demonstrated and proven?

CHIRON fabricated and tested inverter devices, majority gate devices, and transducer devices across two rounds of specifications (TN1 and TN2). They also demonstrated parallel data transmission via frequency multiplexing in a spin wave inverter. In total, 22 deliverables were completed including 7 device demonstrators.

What timeline would adoption require?

Based on available project data, CHIRON achieved proof of principle for basic logic gates. Moving from lab demonstrators to commercial chips typically requires several more years of development. A realistic timeline for early commercial spin wave–CMOS hybrid products would depend on follow-up projects and industry investment.

Consortium

Who built it

The CHIRON consortium brings together 9 partners from 6 countries (Belgium, Germany, Greece, France, Netherlands, Romania), led by IMEC — one of the world's top microelectronics research centres. The consortium is research-heavy with 4 research organisations and 3 universities, plus 2 industry partners (including 1 SME), giving a 22% industry ratio. This composition is typical for a FET Open project pushing fundamental technology boundaries. For a business considering this technology, the strong research base means solid scientific foundations, but the relatively low industry involvement signals that commercial translation will require additional industrial partnerships.

INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUMCoordinator · BE
SOLMATES BVparticipant · NL
IDRYMA TECHNOLOGIAS KAI EREVNASparticipant · EL
RHEINLAND-PFALZISCHE TECHNISCHE UNIVERSITATparticipant · DE
INSTITUTUL NATIONAL DE CERCETAREDEZVOLTARE PENTRU MICROTEHNOLOGIEparticipant · RO
UNIVERSITE PARIS-SACLAYparticipant · FR
THALESparticipant · FR
CENTRE NATIONAL DE LA RECHERCHE SCIENTIFIQUE CNRSparticipant · FR
TECHNISCHE UNIVERSITEIT DELFTparticipant · NL

How to reach the team

IMEC (Interuniversitair Micro-Electronica Centrum), Belgium — a globally recognised microelectronics research hub. SciTransfer can facilitate an introduction.

Order a report on this consortium See INTERUNIVERSITAIR MICRO-ELECTRONICA CENTRUM profile →

Next steps

Talk to the team behind this work.

Want to explore spin wave computing for your next-generation chip designs? SciTransfer can connect you with the CHIRON team and help assess fit for your specific application.

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