Automated Tools That Deploy AI on Small Low-Power Devices Without Expert Programmers

Based on available project data, ALOHA was funded as a Research and Innovation Action with EUR 5,976,415 in EU contribution. Licensing terms are not specified in the public data. Contact the coordinator STMicroelectronics SRL for commercial availability and pricing of the tool flow.

The ALOHA tool flow was specifically designed for heterogeneous architectures, meaning it targets multiple hardware platforms simultaneously. The project delivered a hardware abstraction layer and runtime environment supporting different computing platforms, plus automated partitioning and mapping tools. This suggests the system is built for multi-platform deployment, though scaling beyond the validated use cases would need discussion with the consortium.

The project was coordinated by STMicroelectronics SRL, a major semiconductor company based in Italy. With 7 industry partners and 3 SMEs in the 16-partner consortium across 8 countries, IP ownership likely follows the Horizon 2020 grant agreement rules where each partner owns their contributions. Commercial licensing would need to be negotiated with the relevant IP holders.

The project delivered final releases of the automated algorithm configuration tool, the automated partitioning and mapping tool, the hardware abstraction layer utilities, and a final prototype of the integrated tool flow. These were validated across three use cases: surveillance, smart industry automation, and medical applications. The tools reached a functional integrated state, though transitioning from research prototype to commercial product may require further engineering.

ALOHA was designed specifically to lower the barrier — the project objective states that deploying deep learning on heterogeneous architectures is often unaffordable for SMEs and midcaps without adequate tool support. The tool flow automates algorithm design, porting to embedded platforms, and middleware implementation. The hardware abstraction layer means you would not need to re-engineer for each target chip.

Yes. The project explicitly targets Convolutional Neural Networks and deep learning inference tasks. The automated algorithm configuration tool handles model optimization, while the partitioning tool maps the workload across heterogeneous processors. The tools are designed to take standard DL models and make them run efficiently on embedded hardware.

The project addressed security as one of its main features alongside adaptivity and energy efficiency. However, based on available project data, specific regulatory certifications (such as medical device regulations or safety standards) are not mentioned. Companies in regulated industries would need to verify compliance requirements with the consortium partners.