SciTransfer
ADOPTION · Project

High-Efficiency Optical Interconnects for Hyperscale Data Centers and AI Clusters

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Imagine the cables inside a giant data center are like narrow pipes that are starting to clog as more data flows through them, wasting a lot of electricity. This project replaces those old pipes with a high-tech light-based system that sits right next to the computer chip. It's like moving the water source directly into the kitchen instead of pumping it from across the street, making everything faster and much cheaper to run.

By the numbers
204.8Tb/s
Target switch capacity
6.4Tb/s
Target port speed
3pJ/bit
Target power efficiency
50 cents per Gb/s
Target optical interface cost
1%
Global power consumption by data centres
The business problem

What needed solving

Hyperscale data centers face a critical bottleneck where traditional pluggable optical modules consume too much power and lack the bandwidth to support AI and cloud growth.

The solution

What was built

A co-packaged optics (CPO) transceiver system and a two-part assembly process for integrating photonic components with switch chips.

Audience

Who needs this

Hyperscale cloud providersAI hardware architectsOptical transceiver manufacturersData center infrastructure engineers
Business applications

Who can put this to work

Cloud Computing
enterprise
Target: Hyperscale Data Center Operator

If you are a hyperscale operator dealing with escalating energy demands and bandwidth bottlenecks — this project developed co-packaged optics (CPO) that reduce power consumption to around 3pJ/bit. This allows you to scale switch capacities beyond 204.8Tb/s while lowering operational costs.

Artificial Intelligence
enterprise
Target: AI Computing Cluster Provider

If you are an AI cluster provider dealing with high latency in data transfer — this project developed optical switching and routing architectures. This reduces the time it takes for data to move between chips, increasing the overall efficiency of AI training and inference.

Semiconductor Manufacturing
mid-size
Target: Photonics Component Manufacturer

If you are a manufacturer dealing with low yield and high assembly time for optical modules — this project developed a two-part assembly process and active optical alignment. This simplifies the production of CPO transceivers and improves coupling efficiency.

Frequently asked

Quick answers

What is the target cost for these optical interfaces?

The project aims to reduce the cost of optical interfaces to below 50 cents per Gb/s.

Can this technology scale to meet future data demands?

Yes, it targets switch capacities scaling beyond 204.8Tb/s with port speeds of 6.4Tb/s.

Who owns the intellectual property or licensing rights?

Based on available project data, the project aims to create a European-led ecosystem and redefine the digital supply chain, but specific licensing terms are not listed.

How does this integrate with existing hardware?

It uses 2.5D and 3D co-packaging to integrate high-speed electronic and photonic components directly with the switch chip.

What is the timeline for implementation?

The project period runs from 2023-01-01 to 2026-12-31.

Consortium

Who built it

The consortium is heavily industry-weighted with a 60% industry ratio, comprising 6 industrial partners (including 4 SMEs) and 4 research institutions across 6 countries. This structure suggests a strong focus on commercial viability and supply chain integration rather than purely academic exploration.

How to reach the team

University College Cork, National University of Ireland

Next steps

Talk to the team behind this work.

Contact us to connect with the ADOPTION consortium for CPO licensing and integration.