SciTransfer
2D-ENGINE · Project

Next-Generation Atomically Thin Materials for Ultra-Efficient Chips and Photonics

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Imagine creating a material as thin as a single layer of atoms that doesn't even exist in nature. By using liquid metals as a base, the team is growing these 'impossible' sheets to act as super-efficient switches and light-emitters. It's like replacing bulky old components with a transparent, ultra-strong film that makes electronics faster and cooler.

By the numbers
2 nm
Target technology node for chip miniaturization
7
Number of consortium partners
The business problem

What needed solving

Current chip scaling is hitting a wall at the 2 nm node due to energy inefficiency and heat. Traditional materials cannot be made thin enough without losing stability or performance.

The solution

What was built

The project is building a growth process for non-natural 2D semiconductors (h-GaN, h-SiC) and dielectrics (h-AlN). They developed a real-time monitoring system using Raman spectroscopy and radiation-mode optical microscopy.

Audience

Who needs this

Foundries targeting 2nm nodesSilicon Photonics designersNeuromorphic computing hardware firmsPower electronics manufacturers
Business applications

Who can put this to work

Semiconductors
enterprise
Target: Chip manufacturer

If you are a chip manufacturer dealing with the physical limits of 2 nm technology nodes — this project developed 2D semiconductor channels that allow for extreme miniaturization and superb energy efficiency.

Telecommunications
mid-size
Target: Optical interconnect provider

If you are an optical interconnect provider dealing with high power consumption in on-chip communications — this project developed 2D LED devices integrated with planar waveguides to increase the efficiency of silicon photonic integrated circuits.

Computing Hardware
any
Target: AI hardware developer

If you are an AI hardware developer dealing with the energy bottleneck of memory access — this project developed twisted bilayer h-AlN that enables ultra-low power ferroelectric tunnel junction memristors for in-memory computing.

Frequently asked

Quick answers

What is the estimated cost or price of these materials?

Based on available project data, specific unit costs or pricing models are not provided; the project focuses on the engineering and growth methodology using liquid metal catalysts.

Can this be produced at an industrial scale?

The project aims for wafer-scale production and uses liquid metal catalyst substrates to achieve seamless merging of crystals in the mm scale.

What is the IP and licensing status for these 2D phases?

Based on available project data, specific patent or licensing terms are not listed, though the project involves 7 partners across 4 countries developing new synthetic techniques.

How does this integrate with existing silicon technology?

The materials are designed to be transferable, allowing for the integration of power devices on the back-side of the wafer to decouple power delivery from the signal network.

What is the timeline for commercial availability?

The project period runs from 2023-10-01 to 2027-09-30, suggesting that commercial readiness would follow the conclusion of this research phase.

Consortium

Who built it

The consortium is research-heavy, consisting of 7 partners from 4 countries (DE, EL, FR, NL). With 3 research centers, 2 universities, and 2 SMEs, the industry ratio is 14%, indicating the project is primarily in the high-risk, high-reward discovery phase rather than immediate commercial production.

How to reach the team

Contact the National Center for Scientific Research 'Demokritos' in Greece

Next steps

Talk to the team behind this work.

Contact us to bridge the gap between these 2D material breakthroughs and your semiconductor roadmap.