Imagine trying to draw a map of a city on a grain of sand; that is how small these new computer chips are. This project builds the ultra-precise tools and materials needed to carve these tiny circuits. It is like upgrading from a thick marker to a laser-thin pen to fit more power into a smaller space.
The microelectronics industry is hitting physical limits that make it difficult to keep shrinking chips while maintaining performance. Current tools struggle with the extreme precision required for the 14 Angstrom node.
A 0.55NA EUV scanner platform, a CFET CMOS device, a digital twin for droplet generators, and a PFAS-free photo resist.
If you are a chip foundry dealing with production bottlenecks and slow throughput — this project developed a wafer stocker for EXE machines that cuts scanner overhead and increases productivity. This allows for faster delivery of 14A technology nodes.
If you are a hardware OEM dealing with the physical limits of chip size and power — this project developed the CFET (Complementary Field Effect Transistor) as a new active device. This enables the creation of smaller, more efficient chips for the next generation of devices.
If you are a chemical supplier dealing with strict environmental regulations on PFAS — this project developed a PFAS-free photo resist. This reduces the ecological footprint of the photolithography process while maintaining performance.
Based on available project data, specific pricing for the 14A solutions is not provided, though the project aims to demonstrate a cost efficient solution for the 14A technology node.
Yes, the project is led by ASML and involves 30 industrial partners to ensure the 0.55NA EUV scanner platform meets performance requirements for resolution and throughput in foundries.
Based on available project data, specific licensing terms are not mentioned, but the project involves a consortium of 40 partners including 8 SMEs and large industrial players.
The project period runs from 2023-05-01 to 2026-10-31, indicating the development phase is active through late 2026.
The project investigates three integration options for the CFET device: monolithic, sequential, and hybrid solutions to ensure compatibility with CMOS technology.
The consortium is heavily industry-driven, with 30 industrial partners (75% ratio) and 8 SMEs, led by the global leader ASML. This structure, combined with 10 academic and research institutes across 8 countries, suggests a high probability of commercial adoption and a direct pipeline from research to factory floor.
Contact ASML Netherlands B.V. regarding 14A node integration
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