TCLS ARM FOR SPACE (2015–2017) focused on feasibility and definition of a Triple Core Lockstep ARM SoC specifically for space applications, a classical radiation-hardening technique for fault-tolerant computing.
MICROCHIP TECHNOLOGY NANTES
French semiconductor design centre specialising in radiation-hardened ARM processors and Ethernet transceivers for space applications.
Their core work
Microchip Technology Nantes (formerly Atmel's Nantes design center) is a semiconductor design facility specializing in radiation-hardened and fault-tolerant integrated circuits for space applications. Their engineers design custom System-on-Chip (SoC) solutions built around ARM processor cores, specifically hardened against the cosmic radiation and single-event upsets that destroy standard commercial chips in orbit. They also develop space-qualified communication interface hardware, including physical layer transceivers that bring standard protocols like Ethernet into radiation-tolerant space form factors. As part of Microchip Technology's global portfolio, this site contributes deep know-how in space-grade ASIC and IC design to European space programmes.
What they specialise in
SEPHY (2015–2018) developed a Space Ethernet Physical Layer Transceiver, bringing Ethernet connectivity to space-grade hardware with the necessary environmental and reliability qualifications.
The Triple Core Lockstep approach in TCLS ARM FOR SPACE is a proven fault-detection architecture used in safety-critical and space systems to mask computation errors caused by radiation.
Both projects — a processor SoC and an Ethernet PHY — represent distinct mixed-signal and digital IC product lines targeting European space programmes, consistent with Atmel/Microchip's established space IC portfolio.
How they've shifted over time
Both H2020 projects started in the same year (2015), and no keyword data is available to distinguish an early versus late shift in focus. Within this narrow window, the two projects reveal a consistent specialisation in space-grade silicon: one targeting compute (ARM SoC) and one targeting connectivity (Ethernet PHY), suggesting a deliberate strategy to supply multiple IP blocks for satellite platforms rather than a single niche. Because there are no projects beyond 2018 in this dataset, it is not possible to confirm whether their focus has broadened or deepened since then.
Both known projects were launched simultaneously in 2015 and target complementary layers of a space computing platform — compute and connectivity — suggesting this site positions itself as a multi-block supplier for satellite system integrators rather than a single-product vendor.
How they like to work
Microchip Technology Nantes has participated exclusively as a consortium partner across both projects, never taking the coordinator role, which is typical for a large industrial company contributing specific proprietary IP rather than leading research programmes. With 9 unique partners across 5 countries from only 2 projects, their consortium engagement is moderately broad, pointing to an openness to working with diverse European space-sector actors. This profile — deep specialist contributor inside a consortium led by others — is exactly what system integrators and prime contractors look for when building a space electronics supply chain.
The organisation has collaborated with 9 unique partners across 5 countries through just 2 projects, indicating active multi-partner consortia rather than bilateral arrangements. Their network is European in scope and concentrated in the space sector, likely overlapping with ESA-ecosystem actors and other European space prime contractors.
What sets them apart
Microchip Technology Nantes is one of very few private semiconductor design centres in France — and in Europe — with demonstrated R&D capability in both radiation-hardened processor SoCs and space Ethernet transceivers, covering two of the most critical building blocks in a modern satellite platform. Unlike academic or research institute partners, they bring a commercial IC design track record and access to Microchip Technology's broader product qualification infrastructure. For consortium builders targeting space-grade electronics, this site offers a rare combination of industrial credibility and active R&D engagement in European programmes.
Highlights from their portfolio
- SEPHYThe largest funded project (EUR 572,475) and technically ambitious — developing a Space Ethernet Physical Layer Transceiver brings a ubiquitous terrestrial standard into the radiation-hardened domain, addressing a real gap in satellite on-board data handling.
- TCLS ARM FOR SPACEA feasibility and definition study for a Triple Core Lockstep ARM SoC — this type of work typically precedes a full chip development programme, making it a meaningful signal of long-term product roadmap intent in space-grade processors.